In message  <3.0.32.19970224100413.009057b0@mira> PICLIST@MITVMA.MIT.EDU writes:
> At 18:42 21.02.97 -0600, you wrote:
> >> > Right.  What happens if FSR happens to be pointing at a register which
> would
> >> > be affected by the read?
> >>
> >> Even though movwf 0,w would be the obvious interpretation of opcode>
 0x0000
> >> surely it would never be executed as such so we never have to worry about
> >> where FSR points.  Or have I got that wrong?
> >
> >Well, on the 16C74, a RETURN instruction (0x000D) does a read to port D (at
> >address 0x000D) which will clear the incoming byte flag if that port is>
 used
> >in parallel-slave mode.  Draw your own conclusions (I would not rely on>
 that
> >behavior, because Microchip may fix it, but AFAIK current silicon works>
 that
> >way.  Fortunately, on the PIC very few things are affected by reads.
> >
>
> I can't believe, that PICs behave the way you say.
> It should be easy, to decode special instructions in a way that they don't
> have theses side effects you mentioned.
> The data sheets _SHOULD_ also mention them?!?
>

It sure seems to be worrying.

Can we have some comment from Microchip on this please? Brian?

Regards,


Mike Watson