Brian wrote:

>If anything, a hot chip will erase faster.  We use a 250 deg.C bake to
>test the retention of our EPROM cells.  If a wafer is subjected to a
>450 deg.C bake, it will erase the chip without any light at all.
>Erasing occurs when enough energy is imparted to the stored electrons
>on the floating gate to cause them to leave the poly 1 lattice.  The
>e-field created by the stored charge then propels the electron back to
>the silicon surface.  As erasing continues, the e-field gets weaker.
>This creates an erase time profile that is an exponential decay. All
>that maters is that you have enough energy from heat or light to
>continue to remove electrons from the poly 1 lattice.


>Rgds, Brian.

 Does this mean that we can subject OTP parts to 842 degrees F (450 C)
and erase them?
I do some work with PICs and a lot of work with ZILOG.  I go through a
ton of ZILOG OTPs in development.  I would be happy to be able to erase
and reuse just a fraction of these chips.
If this is possible, please post the bake times required.  Thanks.

 ----- Steve