> I'd like article on RB4-7 interrupt on change function occasionally failing.

Essentially, what happens is that on the PIC any read or write [even MOVWF]
to the port B register will latch the compare register; if a port pin happens
to change just as such a read or write is taking place, it's possible for
there never to be a mismatch because the comparator could be comparing 0<->0
at one moment and 1<->1 the next.

Later PICs have logic to deal with this, though as a consequence they may not
detect changes shorter than one clock cycle.  I don't know how this circuitry
works when the chip goes into "sleep" mode [since one clock cycle could be a
REALLY LONG time...