Steve Hardy wrote:
>
> > From: Paul Mathews <optoeng@WHIDBEY.COM>
> >
> > [cut]
> >
> > In order for this scheme to work properly, various errors in the system
> > need to be random (or, alternatively, fortuitously cancelling one
> > another).  In general, non-linearities in the A/D are not entirely
> > random, so averaging cannot be expected to improve results beyond a
> > certain point.  However, for random errors, the Central Limit Theorem
> > applies, and you can theoretically reduce your measurement error by a
> > factor proportional to root (N-1), where N is the number of samples
> > participating in the averaging process.  For a 32x improvement (4 bits)
> > you need at least 1024x oversampling.
>
> I realise you are talking about adding gaussian noise, but if you use a
> non-random 'dither', one can do a lot better than sqrt(N).  In fact,
> one should be able to get exp(N) improvement by performing a binary
> search.  E.g. suppose one has a perfect 8-bit ADC; an auxiliary perfect
> 8 bit DAC whose output is scaled so that it encompases one LSB of the
> ADC, and this output is added to the analogue signal to be sampled
> (after it has gone through the sample-and-hold buffer).
>
> An effective 16-bit sample may be obtained by performing a binary
> search using the DAC while observing the ADC output changing by one LSB
> count.
>
> Now I am fairly sure a variant of this technique is used in some 'half
> flash' ADCs which are hybrid flash and successive approximation
> registers.  In practice, using the PIC16C74, the lack of a fast DAC is
> the main problem.  The PWM output will not swing rapidly enough for a
> binary search so one would be restricted to a linear search: still
> better than sqrt(N) improvement.
>
> All the above is moot if the ADC's nonlinearity doesn't justify the
> added bits of readability.  However, clever software could improve the
> situation by counting the number of DAC bits between each ADC
> transition.
>
> An interesting project would be to verify the accuracy and linearity
> of the PIC's ADC.  I would set up a known linear ramp (capacitor
> charged by constant current source) then use TMR1 to time each
> transition of the ADC output.  TMR1 would be set up to overflow
> near the top of the ramp, thus allowing for 16-bit resolution.
>
> Regards,
> SJH
> Canberra, Australia


Yes.  You make some very good points.  I was trying to keep the
discussion simple, but I should have mentioned that there are more
sophisticated approaches.  Thanks.
--

Paul Mathews, consulting engineer
AEngineering Co.
optoeng@whidbey.com
non-contact sensing and optoelectronics specialists