Martin Nilsson <mn@SICS.SE> stated quite correctly, that:
>MOSFETs are different, and have positive temperature coefficient, so
>from this point of view, their outputs can be paralleled. However,
>there can be other problems with paralleling MOSFETs.

Quite true.  The sales blurb would have you believe that paralleling MOSFETs
is an easy thing to do.  However, two problems result from multiple devices:

1.  they require increased drive due higher input capacitance (Cgs), and
2.  the pos resistance tempco of the device (0.5 to 0.6 % per degree C) can
work against you with the thermal time constant of the heat sink...

The whole idea is that the MOSFET device which is hogging the most current
will "automatically" throttle itself back as its die heats up internally.  A
number of years back I fabricated an array of parallel MOSFETs to handle
higher currents, and regardless of care taken in matching them, I invariably
had trouble with popping individual devices in the array, inspite of the
fact that they were well within their SOA, and quiescent current through the
array kept decreasing as the heatsink got hotter (another annoying trait in
linear applications).


After Martin second-guessed himself, Jonathan King <king@UICC.COM> went on
to advise:
>I think it was right the first time?
>MOSFETs have a positive TC -> their resistance does goes up with temperature.
>when paralleled, the FET getting hot increases its resistance,

Correct.  the tempco of MOSFET devices is often a subject of confusion,
because writers often omit the measure (eg: resistance) or context (eg:
channel).  The device's "Channel resistance" (Rds) tempco is positive
without doubt, but confusion often results because a MOSFET's Vgs threshold
has a negative tempco.   To prevent unwittingly perpetuating the confusion,
it's best follow Jonathan's example above: spell out what you mean in words.

Hope this helps,
.... Gregg