Now that we are discussing the 17C42, I have a question.

  Port A does not have a Tri-state register because its only two outputs
(RA2 and RA3) are open-collector.  Therefore, upon reset, it is important
that the output register be "set" to "1" in order to avoid driving the I/O
lines during reset.  All other Ports show their tri-state registers being
set to "input" upon reset, so I'm not worried about them.  But, this Port A
worries me.

  If I configure RA2 as an output, what is it's state during reset.  If I
configure RA2 as an input, will the open-collector try to suck the life out
of the device who thinks that it "owns" this line while the 17C42 is still
in reset.

  At this point, I am so frustrated that I am likely to tie these two pins
to ground and forget about them.  This will satisfy the EPROM programming
requirement that RA4 is high, and RA3/RA2 are low.  And, I wonder if the
programming specification was written this way _because_ of this "feature".

  -- Hank