Hi Everyone! As I promised, I am posting the solution to my interrupt blues with Microchip's version of the Byte Craft C compiler. It turned out that, apart from the inadequate "Hello, world" - type examples that demonstrate very little, Microchip's header file for the 16c74 is totally different from the one that Walter Banks from Byte Craft mailed me directly (and generously). Viva Walter! Rhubarb Microchip! (I'm still waiting for the answer from them). Use the "SaveContext" and "RestoreContext" definitions upon entry and exit of your interrupt service routine. I'm not sure if I will have to go through the whole hog again for the other processors, but I'll cross (fall off) that bridge when I get to it . I hope Byte Craft doesn't mind (or worse - sue me 8-0 ) for posting this code. Save this code as "16c74.h" One last thing : I had to change the line "#pragma has PIC16C74;" with "#pragma processor PIC16C74;" to get it to work. #pragma option -l; #ifndef __16C74_H #define __16C74_H /* MPC Code Development System Header file for PIC16C74 V1.30 16C74.H (c) Copyright 1995 Byte Craft Limited 421 King St.N., Waterloo, ON, Canada, N2J 4E4 Sherif Abdel-Kader 1.12D SAK Split pin declaration for RW_ and DA_ into R, W_, D, A_ as in the older version of the header 1.30 SAK Added SaveContext macro */ // Processor core #pragma has PIC14; // Procssor type #pragma has PIC16C74; #pragma option +l; // Reset and Interrupt vectors #pragma vector __RESET @ 0x0000; #pragma vector __INT @ 0x000B; // ROM and RAM size/starting address #define MAXB0 0x80 // Register file Bank 0 space (128 words) #define MAXB1 0x100 // Register file Bank 1 space (128 words) #ifdef NOLONG #pragma memory RAM [MAXB0 - 0x28] @ 0x28; #else #pragma memory RAM [MAXB0 - 0x30] @ 0x30; #endif #pragma memory RAM [MAXB1 - 0xA1] @ 0xA1; char temp_WREG @ 0x20; // 0xA0 also saved for it char __WImage @ 0x21; char temp_WImage @ 0x22; char temp_STATUS @ 0x23; char temp_PCLATH @ 0x24; char temp_FSR @ 0x25; char __FSRImage @ 0x26; char temp_FSRImage @ 0x27; #pragma option -l; #ifndef NOLONG #pragma option +l; long __longAC @ 0x28; char __longAC_L @ 0x28; char __longAC_H @ 0x29; long __longIX @ 0x2A; char __longIX_L @ 0x2A; char __longIX_H @ 0x2B; char temp_longAC_L @ 0x2C; char temp_longAC_H @ 0x2D; char temp_longIX_L @ 0x2E; char temp_longIX_H @ 0x2F; #pragma option -l; #endif #pragma option +l; // Save context when handling interrupts #asm org 4 movwf temp_WREG ;goes to 0x20 or 0xA0 0004h swapf 03,W ; 0005h bcf 03,5 ;Bank 0 0006h movwf temp_STATUS ;Save STATUS 0007h movf 0x0A, W ; 0008h movwf temp_PCLATH ;Save PCLATH 0009h clrf 0x0A ;Clear PCLATH 000Ah #endasm #define MAXROM 0x1000 // Total program memory space ( 4K words) #pragma memory ROM [MAXROM - 0x0D] @ 0x0D; #pragma option -l; // Working (W) register registerw WREG; // Special-purpose Registers, Bank 0 #pragma portrw INDF @ 0x00; #pragma portrw TMR0 @ 0x01; #pragma portrw PCL @ 0x02; #pragma portrw STATUS @ 0x03; #pragma portrw FSR @ 0x04; #pragma portrw PORTA @ 0x05; #pragma portrw PORTB @ 0x06; #pragma portrw PORTC @ 0x07; #pragma portrw PORTD @ 0x08; #pragma portrw PORTE @ 0x09; #pragma portrw PCLATH @ 0x0A; #pragma portrw INTCON @ 0x0B; #pragma portrw PIR1 @ 0x0C; #pragma portrw PIR2 @ 0x0D; #pragma portrw TMR1L @ 0x0E; #pragma portrw TMR1H @ 0x0F; #pragma portrw T1CON @ 0x10; #pragma portrw TMR2 @ 0x11; #pragma portrw T2CON @ 0x12; #pragma portrw SSPBUF @ 0x13; #pragma portrw SSPCON @ 0x14; #pragma portrw CCPR1L @ 0x15; #pragma portrw CCPR1H @ 0x16; #pragma portrw CCP1CON @ 0x17; #pragma portrw RCSTA @ 0x18; #pragma portrw TXREG @ 0x19; #pragma portrw RCREG @ 0x1A; #pragma portrw CCPR2L @ 0x1B; #pragma portrw CCPR2H @ 0x1C; #pragma portrw CCP2CON @ 0x1D; #pragma portrw ADRES @ 0x1E; #pragma portrw ADCON0 @ 0x1F; // Special-purpose Registers, Bank 1 #pragma portrw OPTION @ 0x81; #pragma portrw TRISA @ 0x85; #pragma portrw TRISB @ 0x86; #pragma portrw TRISC @ 0x87; #pragma portrw TRISD @ 0x88; #pragma portrw TRISE @ 0x89; #pragma portrw PIE1 @ 0x8C; #pragma portrw PIE2 @ 0x8D; #pragma portrw PCON @ 0x8E; #pragma portrw PR2 @ 0x92; #pragma portrw SSPADD @ 0x93; #pragma portrw SSPSTAT @ 0x94; #pragma portrw TXSTA @ 0x98; #pragma portrw SPBRG @ 0x99; #pragma portrw ADCON1 @ 0x9F; // STATUS register bits #define C 0 #define DC 1 #define Z 2 #define PD_ 3 #define TO_ 4 #define RP0 5 #define RP1 6 #define IRP 7 // PORTA register bits (only special pins) #define T0CKI 4 #define SS_ 5 // PORTB register bits (only special pins) #define INT 0 // PORTC register bits (only special pins) #define T1CKI 0 #define T1OSI 0 #define T1OSO 1 #define CCP2 1 #define CCP1 2 #define SCK 3 #define SCL 3 #define SDI 4 #define SDA 4 #define SDO 5 #define TX 6 #define CK 6 #define RX 7 #define DT 7 // PORTE register bits (only special pins) #define RD_ 0 #define WR_ 1 #define CS_ 2 //INTCON register bits #define RBIF 0 #define INTF 1 #define T0IF 2 #define RBIE 3 #define INTE 4 #define T0IE 5 #define PEIE 6 #define GIE 7 // PIR1 register bits #define TMR1IF 0 #define TMR2IF 1 #define CCP1IF 2 #define SSPIF 3 #define TXIF 4 #define RCIF 5 #define RXIF 5 // old name #define ADIF 6 #define PSPIF 7 // PIR2 register bits #define CCP2IF 0 // T1CON register bits #define TMR1ON 0 #define TMR1CS 1 #define T1SYNC_ 2 #define T1OSCEN 3 #define T1CKPS0 4 #define T1CKPS1 5 // T2CON register bits #define T2CKPS0 0 #define T2CKPS1 1 #define TMR2ON 2 #define TOUTPS0 3 #define TOUTPS1 4 #define TOUTPS2 5 #define TOUTPS3 6 // SSPCON register bits #define SSPM0 0 #define SSPM1 1 #define SSPM2 2 #define SSPM3 3 #define CKP 4 #define SSPEN 5 #define SSPOV 6 #define WCOL 7 // RCSTA register bits #define RCD8 0 #define OERR 1 #define FERR 2 #define CREN 4 #define SREN 5 #define RC89 6 #define SPEN 7 // CCP2CON register bits #define CCP2M0 0 #define CCP2M1 1 #define CCP2M2 2 #define CCP2M3 3 #define CCP2Y 4 #define CCP2X 5 // ADCON0 register bits #define ADON 0 #define GO 2 #define DONE_ 2 #define CHS0 3 #define CHS1 4 #define CHS2 5 #define ADCS0 6 #define ADCS1 7 // OPTION register bits #define PS0 0 #define PS1 1 #define PS2 2 #define PSA 3 #define T0SE 4 #define RTE 4 #define T0CS 5 #define RTS 5 #define INTEDG 6 #define RBPU_ 7 // TRISE register bits #define TRISE0 0 #define TRISE1 1 #define TRISE2 2 #define PSP_MODE 4 #define IBOV 5 #define OBF 6 #define IBF 7 // PIE1 register bits #define TMR1IE 0 #define TMR2IE 1 #define CCP1IE 2 #define SSPIE 3 #define TXIE 4 #define RCIE 5 #define ADIE 6 #define PSPIE 7 // PCON register bits #define POR_ 1 // SSPSTAT register bits #define BF 0 #define UA 1 #define RW_ 2 #define R 2 #define W_ 2 #define S 3 #define P 4 #define DA_ 5 #define D 5 #define A_ 5 // TXSTA register bits #define TXD8 0 #define TRMT 1 #define BRGH 2 #define SYNC 4 #define TXEN 5 #define TX89 6 #define CSRC 7 // ADCON1 register bits #define PCFG0 0 #define PCFG1 1 #define PCFG2 2 // REFIE macro #define __RETFIE() #asm ( retfie) #ifdef NOLONG #asm MACRO PUSH movf __WImage,W ; movwf temp_WImage ;Save __WImage movf FSR,W ; movwf temp_FSR ;Save FSR movf __FSRImage,W; movwf temp_FSRImage ;Save __FSRImage ENDM #endasm #else #asm MACRO PUSH movf __WImage,W ; movwf temp_WImage ;Save __WImage movf FSR,W ; movwf temp_FSR ;Save FSR movf __FSRImage,W; movwf temp_FSRImage ;Save __FSRImage movf __longAC_L, W ; movwf temp_longAC_L ; movf __longAC_H, W ; movwf temp_longAC_H ; movf __longIX_L, W ; movwf temp_longIX_L ; movf __longIX_H, W ; movwf temp_longIX_H ; ENDM #endasm #endif #ifdef NOLONG #asm MACRO POP BCF STATUS,RP0 MOVF temp_FSRImage, W MOVWF __FSRImage MOVF temp_PCLATH, W MOVWF PCLATH MOVF temp_WImage, W MOVWF __WImage MOVF temp_FSR, W MOVWF FSR SWAPF temp_STATUS, W MOVWF STATUS ;RP0 restored SWAPF temp_WREG,F SWAPF temp_WREG,W ;W restored ENDM #endasm #else #asm MACRO POP BCF STATUS,RP0 MOVF temp_longIX_H, W MOVWF __longIX_H MOVF temp_longIX_L, W MOVWF __longIX MOVF temp_longAC_H, W MOVWF __longAC_H MOVF temp_longAC_L, W MOVWF __longAC_L MOVF temp_FSRImage, W MOVWF __FSRImage MOVF temp_WImage, W MOVWF __WImage MOVF temp_PCLATH, W MOVWF PCLATH MOVF temp_FSR, W MOVWF FSR SWAPF temp_STATUS, W MOVWF STATUS ;RP0 restored SWAPF temp_WREG,F SWAPF temp_WREG,W ;W restored ENDM #endasm #endif #define SaveContext #asm " PUSH" #define RestoreContext #asm " POP" #endif #pragma option +l; -- Friendly Regards Tjaart van der Walt ______________________________________________________________ | Another sun-deprived R&D Engineer slaving away in a dungeon | |WASP International GSM vehicle tracking and datacomm solutions| | +27-(0)11-622-8686 | http://wasp.co.za | |______________________________________________________________|