> Some time ago, inspired by Jahn Favata initial work on porting smallC
> C compiler to support PIC I decided to rewrite the entire code.
>
> Due to the lack of time (academic duties) further development slows down.
> If there is anyone who would like to help in the development please do
> get in touch with me.

I've been toying with the idea of doing a PIC compiler or building a PIC
rear-end into a compiler.  My plan-of-attack would be to decompose the
program into sub-ops each of which has a list of source and destination
locations [e.g. add16 [source1L,source1h,source2l,source2h],[destl,desth]
using a fairly straightforward parser and generating temporary labels
as needed, then feed these sub-ops into an overlay generator which would
find the first and last reference to each variable and overlay variables
which are never in simultaneous use.  After that, I'd run the code through
a simple code generator with a peephole optimizer that would track the W
and FSR registers; each would be--at every instruction--either "unknown",
"known constant [value]", or "known to be equal to register [register]";
if W is known to be a constant, any instruction "movlw" of that constant
would be suppressed; if W is known to be equal to a register any "movf"
or "movwf" with that register would be suppressed unless needed to set
the zero flag.

One issue which I'd have to address would be "volatile" variables.  Although
the PIC doesn't pose the normal problems associated with such variables, it
does pose a couple; for example, the instruction [A and B are bytes]:

  A=B<<5;

could be compiled very nicely as

        rlf     B,w
        andlw   $0E
        movwf   A
        swapf   A

but such code could be disastrous if A was, e.g., an I/O port; in that case,
the code would have to be

        rlf     B,w
        movwf   temp
        swapf   temp,w
        andlw   $FC
        movwf   A

which requires an extra instruction as well as possibly requiring the
extra location 'temp'.  A more significant example would be [A and B are
bits] the instruction

  A=B;

which could be compiled as

        bcf     A
        btfsc   B
         bsf    A

but only if clearing and setting A won't have any effect.  Otherwise, the
four-cycle sequence

        btfss   B
         bcf    A
        btfsc   B
         bsf    A

is needed, but that's significantly less efficient.