> Have any of you received a Warning [224] for the 16C84 when using a TRIS
> command??
> I have successfully assembled an file for the 16C54 w/ no warnings or
> errors, but if I
> change the assembler directives for a 16C84 the following warning is
> found whenever
> a TRIS is used.
>
> Warning[224]: Use of this instruction is not recommended.

Microchip does not recommend the use of the TRIS or option instructions
because of the possibility that future CPU's may not support such a thing.
I am aware of no actual plans to discontinue support for these instructions
and would hope that any future CPU's would allow setting the TRIS registers
without the annoying bank-switching that's required to do it the "right"
way [for example, it would probably be fairly easy to design a CPU so that
another page-zero address would decode to the upper I/O.  For example, if
the PIC16C84 were modified so that addresses $80-$8F were mapped to $70-$7F
(and maybe, in consequence, $F0-FF as well) then TRIS PORTB could be simply
assembled as "MOVWF $76".

Personally, I find "TRIS PORTB" to be much clearer and more reasonable than
"BSF RPO / MOVWF PORTB / BCF RP0" which is what is otherwise required.