> Does anyone have a definitive answer for the following?
>
> If the PIC16CXX is executing a goto, the manual states that the
> CPU executes an internal NOP in place of the following instruction
> which was prefetched (but not executed).
>
> When an interrupt occurs, it could interrupt the goto in one of two
> places: during the fetch of the goto or during the execution of the
> NOP.
>
> Alternatively, the architecture could block the interrupt until the
> NOP is completed.

According to my understanding of the documentation, the first cycle follow-
ing an interrupt will either be a "skip" cycle [if the instruction just
executed was a skip] which advances the PC or a "dummy" cycle which does
not.  While the latency between the interrupt triggering and it being taken
will be constant, the total time taken by the interrupt may not; in prac-
tice this will almost never be an issue.