Hi,

> >a simple math problem.
> >How do I implement in as little cycles as possible?
> >
> >if abs(outloc - inloc) > 4 then goto X
> >
> >My 2 complement is a bit rusted.
> >
> >Ronald
>
> It depends if you are using a PIC with the SUBWF operand. In either case you
> can't simply add 4 to inloc then subtract in case inloc is in the range
 0xFC-FF.
>
> With SUBWF
>
>         MOVF outloc,W
>         SUBWF inloc,W
>         BTFSC Status,C  ; Check for inloc > outloc
>         GOTO X
>         SUBLW 4
>         BTFSS Status,C  ; Check for result 0..3
>         GOTO X
>
>
> Without SUBWF
>
>         MOVF inloc,W
>         XORLW 0xFF
>         ADDLW 0x01      ; Form two's complement
>         ADDWF outloc,W
>         BTFSC Status,C  ; Check for inloc > outloc
>         GOTO X
>         ADDLW 0xFC      ; Same as SUBLW 4
>         BTFSS Status,C  ; Check for result 0..3
>         GOTO X
>
> Hopefully someone will come up with a neater solution but this should work
> (I haven't had time to try it yet.)

Very bulky, perhaps the only answer even so.

I have a very similar requirement I would be pleased to hear suggestions
on, it might also solve the previous problem in a round about way.

This is for a highspeed serial routine that has to do many things at
once similar to the MIDI UART thread going on.  For a 10 MHz device
16Cxx we and a async bit rate of 57600 we get 43.4 TMR0 ticks per
bit (no prescaler).

I wish to keep a target register with the next closet time for a bit
sample point or generate point as I do not want to modify the TMR0
because it is a shared counter between the 2 fullduplex serial routines
I also have to service a fast 50-70 kHz interrupt in the meantime so cannot
make the foreground code too big so as to keep the bit jitter within
limits.

The need is to add the bit interval 43 to the TMR0 value and store it in
target_reg.  Then we need to keep testing target to see if TMR0 is within
say 4 counts of target.  The thing that bothers me is the wrap around
as the testing gets extreme (see code sample above)  so I propose the
following.

Subrtact the two numbers mask out high 2 bits and low 2 bits as we only
want 4 count accuracy and we know that the numbers will always be less than
64 counts apart.  Will the result be 00111100 or 00000000 when the
difference is less than 4 irrespective of wrap around.  I will be doing
the grunt work of trying out the various options in the next day or two
unless someone has already got the answer.

Cheers
--
Kalle Pihlajasaari     kalle@data.co.za
Interface Products     Box 15775, Doornfontein, 2028, South Africa
+27 (11) 402-7750      Fax: +27 (11) 402-7751