I was told by Microchip Rep that the BRGH bug was not fixed at the 16C74A. Chaipi \\\|/// \\ ~ ~ // ( @ @ ) ----------------------------oOOo-(_)-oOOo-------------------------------------- ! ! ! Chaipi Wijnbergen ! ! Electronics/Computer Eng. M.Sc. Tel : +972-8-9343079 ! ! Optical Imaging Laboratory Fax : +972-8-9344129 ! ! Brain Research Center Email : chaipi@tohu0.weizmann.ac.il ! ! Weizmann Institute of Science URL : http://www.weizmann.ac.il/~chaipi ! ! Rehovot 76100 ISRAEL IPhone : chaipi ! ! ! ------------------------------------Oooo.-------------------------------------- .oooO ( ) ( ) ) / \ ( (_/ \_) On Sat, 22 Jun 1996, Ed VanderPloeg wrote: > Does anyone know if the BRGH problem has been fixed with the > 16C74A? > > -Ed V. > > > ______________________________ Reply Separator _________________________________ > Subject: Re: 16C74 BRGH bug > Author: pic microcontroller discussion list at > InterNet > Date: 6/22/96 6:13 AM > > > Mike Fahrion wrote: > > A product has fallen into my lap with a 16C74, using the USART for > > asynchronous RX with the BRGH bit set. It isn't working properly (at > > all?) when configured for 8 data bits + parity. The only microchip > > documentation I found was the April '96 errata stating "a high number > > of receive errors may be experienced". I've experienced zero > > problems with 8 data bits and no parity. > > Well, I'm using the 16C65, but the same language is used in that part's errata > sheet. I was receiving 16-byte packets at 9600 baud (BRGH=1), with bit 8 used > as an > address flag -- I never tried it without the parity/bit 8. > > Results observed were: 10-20% of received packets were corrupted. Upon closer > examination, a single character within each corrupted packet was found to be > corrupted. > > > ----------------------------------------- > Frank Latos, Duo Systems Inc. > flatos@mich.com > ----------------------------------------- >