> > I have an idea for a PIC evaluation board similar to Motorola's > HC11 board, but perhaps someone has already thought of it. I took a crack at it about a year ago. Mixed results. I'll be glad to share my experience. > > The PIC would be set up to execute code in external memory, into > which the user's program could be downloaded. This would only be > possible for the 17Cxx because only the 16-bit core products > support code off-chip. That's correct. I tested this with a PIC 17C42. Since I didn't (and still don't) have a 17C42 programmer, I hit upon the idea of loading the external ram with a dual port circuit that was driven by a 16C84 (which I could program). The circuit used tri-state buffers to select the RAM owner. The 16C84 also had control of the 17C42 MCLR line so that it could reset the the 17C42 at will. The 16C84 implemented a standard RS-232 serial port that connected to a PC for programming. Since then I've decided that serial EEPROM are a more permanent and efeective method of storing programs for loading. > > The board would have a "host" serial port for connecting to > a development host such as an IBM-PC. The PIC would be > preprogrammed with a small monitor program for downloading, > debugging, etc. Breakpoints could be supported by gating > a latch with the address bus -- a match would cause a > reset or an interrupt, etc. > > A 2nd, "user" serial port would allow general communications. All > the remaining i/o ports would be brought out to pin headers and > possibly a prototyping area. The only problem is that a second serial port would have to be implemented somehow. I've setteled on Signetics 26C91 serial ports because of the small footprint (28 pin slim DIP) and the fact it implements yet another timer (along with an internal bit rate generator) for use. Would the other UART (or the host one for that matter) be done in software? > > If such a thing is already available, could someone tell me where > and from whom? Haven't heard of one. > > BTW a neat trick would be to extend the on-chip RAM by providing > for writing to data tables in the code area (ie. a form of self- > modifying code). For instance a C constant array compiles to the > form > > ADDWF PC,OFFSET > RETLW DATA_0 > RETLW DATA_1 > RETLW DATA_2 ; etc. > > where OFFSET is the array index. > > With this code running in RAM and special hardware logic to write > to it, the processor could change DATA_0, etc. on the fly. > Unnecessary. The 17C42 has table read/write instructions which modify off chip (and on chip for that matter) RAM/EPROM. My main goal was to develop a 17C42 based system without having the program it. It took quite a few parts and the dual port circuitry seemd to interfere with the normal operation of the 17C42. > Regards, D.M. > Good idea. Good luck with it. BAJ