Mark Peterson wrote: > >> This is the start of my interrupt service routine - it saves W, > >> STATUS, FSR and PCLATH. I'm thinking however that there'll be a > >> problem if an interrupt occurs when STATUS,RP0 is set.... temp_w > >> is then in the wrong register bank, and it'll overwrite whatever > >> that location's being used for.. > > After entering an ISR, the GIE bit is cleared. Save_context then > occurs in a safe environment. If the GIE bit was set=1 before > Save_context was done the above could happen. Mark: No offense, but I think you're confused here. The situation Jim described (STATUS,RP0 set on entry to Save_Context) happens WHENEVER an interrupt occurs while the PIC is directly manipulating page-1 registers; it has nothing to do with the state of the GIE bit. > An aside: One tutorial program in ECH uses the sequence below: > > [snip snip snip] > > call SetupForLoop ;occurs exactly before the > ;wait loop. > loop goto loop ;wait for an interrupt > > > SetupForLoop > (etc.) > RETFIE ;Sets GIE=1. Don't have to > ;re-examine GIE > ;because it's set by > hardware and it overrides > ;everything else including > ;any instructions in > ;the pipeline. > ;The alternative to that > technique is... in a > ;paranoid manner be sure it > ;is set. > ;ex: > ;AreYouSure bsf INTCON,GIE > ; btfss INTCON,GIE > ; goto AreYouSure? > > **The novelty here is in the unorthodox use of a RETFIE instruction > (or is that what Microchip intended it for, dual-use?) I notice the > statistics are in favor of the AreYouSure approach, in fact that's > in the 16c74 manual as well. Again, you may be confused. The "AreYouSure" technique is useful and necessary ONLY when you CLEAR the GIE bit; there's no need to double-check GIE when you set it (unless your ISR does something bizarre like ending with a "RETURN" instead of a "RETFIE"). -Andy Andrew Warren - fastfwd@ix.netcom.com Fast Forward Engineering, Vista, California http://www.geocities.com/SiliconValley/2499