At 11:08 AM 5/22/96 -0800, you wrote:
>Jim Main <PICLIST@MITVMA.MIT.EDU> wrote:
>
>> This is the start of my interrupt service routine - it saves W,
>> STATUS, FSR and PCLATH.  I'm thinking however that there'll be a
>> problem if an interrupt occurs when STATUS,RP0 is set.... temp_w is
>> then in the wrong register bank, and it'll overwrite whatever that
>> location's being used for..
>>



After entering an ISR, the GIE bit is cleared. Save_context then occurs in a
safe environment. If the GIE bit was set=1 before Save_context was done the
above could happen.

An aside: One tutorial program in ECH uses the sequence below:

        ORG     0
        goto    Init

        ORG     04
        goto    ISR

init    (etc.)
               ...
        bcf     STATUS,GIE
               ...
        call    SetupForLoop            ;occurs exactly before the wait loop.
loop    goto    loop                    ;wait for an interrupt


SetupForLoop
        (etc.)
        RETFIE                          ;Sets GIE=1. Don't have to
re-examine GIE
                                        ;because it's set by hardware and it
overrides
                                        ;everything else including any
instructions in
                                        ;the pipeline.
                                        ;The alternative to that technique is...
                                        ;in a paranoid manner be sure it is set.
                                        ;ex:   AreYouSure      bsf   INTCON,GIE
                                        ;                      btfss INTCON,GIE
                                        ;                      goto  AreYouSure?
                                        ;"AreYouSure" is well documented in
the device
                                        ;spec sheets.
ISR     (etc.)


**The novelty here is in the unorthodox use of a RETFIE instruction (or is
that what Microchip intended it for, dual-use?) I notice the statistics are
in favor of the AreYouSure approach, in fact that's in the 16c74 manual as well.





>> The only way round it is to leave the corresponding bank1 register
>> free, so that it doesn't matter - but then you'd have to know which
>> bank to look in when it comes time to restore the registers at the
>> end of the routine..  eg you'd have to restore the STATUS register
>> before restoring the W register
>>
>> Does this sound ok, or is there a simpler method?
>
>Jim:
>
>The method you describe is the commonly-accepted one (it's even in
>the 16C7x data book).  It'll work just fine.
>
>-Andy
>
>Andrew Warren - fastfwd@ix.netcom.com
>Fast Forward Engineering, Vista, California
>http://www.geocities.com/SiliconValley/2499
>
>