Hi, > Chaipi Wijnbergen wrote: > > I chnaged my code to use BRGH=0 and still get communication errors, now, > > I don't know if the errors are due to a bug in the baud rate generator or > > due to errors in baud rate. So, my question is, would 1.36% error in baud > > rate cause reception errors ? > No, an error of 1.36% should have no discernible effect. As a rule of thumb, > when using 8 bit serial data, you can go to about 5% baud rate error before > you have problems. It depends on the receiving UART configuration. What you say almost holds for most hardware UARTs (I think the C74/3 will be the same). Software UARTs often have less compliance. The following formular will give you a limit of the max error if you have coded your software UART well. Remember that 3 times oversample is the minimum that will give no errors. I will do two examples one with the usual Hardware UART and then my High Speed (1 Mb/s) software UART to compare the max timing error that is allowed. Max Timing Error = ((number of times over sampled - sampling uncertainty) DIV 2) / number of times over sampled / total number of bits in word * 100% For typical Hardware UART MTE = ((16 - 1) DIV 2) / 16 / 10 * 100% = 4.375% For tight fast software UART MTE = ((5 - 3) DIV 2) / 5 / 13 * 100% = 1.538% For regular 4* software UART MTE = ((4 - 1) DIV 2) / 4 / 10 * 100% = 2.5% For a 5* software UART, good value for money MTE = ((5 - 1) DIV 2) / 5 / 10 * 100% = 4% If you leave out the sampling uncertainty from the equation you get an MTE = 5% for the hardware UART but this is optimistic as there is a sampling error of one 1/16 sampling interval in almost all hardware UARTs. If one were to build a high performance Interrupt driven software or a custom over-kill FPGA design that uses the highest clock to start the 16*Baud clock then you could have the following senario. Interrupt driven software UART or custom FPGA UART MTE = ((2 - 0) DIV 2) / 2 / 10 * 100% = 5% Notice the change of the sampling resolution does not change the situation due to the fact that over 10 bits a 5% error will multiply to half a bit. If you have a receiver that will retime on every data edge and your protocol will supply at least one mid word data edge then you can reduce the effective word length. Custom UART with mid word retiming MTE = ((2 - 0) DIV 2) / 2 / 5 * 100% = 10% Enough rambling but the gist of it is that you should keep your sampling intervals high and your word length reasonable and not ignore your sampling uncertainty. Cheers -- Kalle Pihlajasaari kalle@data.co.za Interface Products Box 15775, Doornfontein, 2028, South Africa +27 (11) 402-7750 Fax: +27 (11) 402-7751