Paul Bulmer wrote: > > The following code samples data and then ouputs it , but i'm stuck big style > i am oversampling by 4 times the data rate ie 32Khz and what i want to do is > cut out bits i don't want , the theory is if i oversample by 4 times what would > normally be a 1 because its oversampled it would be 1111 and the same for 0 . > but how do i put this in my code and if there is a error condition like 1011 > chances are its 1 one is there a efficiant way to do this ? --- I removed the code --- Paul, I'm not sure exactly what you are trying to do..., but it sounds like you want to use the PIC as a kind of filter. In other words, you want to remove glitches from a signal. Assuming this is what you want I have a few suggestions. If this is not what you want, well... maybe someone will find this useful. 1) If you are using the PIC16C6X + family, move your input signal from PORTA<0> to one of the other inputs with schmitt trigger input buffers (e.g. PORTA<5>). However, from the context of your assembly program I assume your using the 5X family (MicroChip recommends against the use of the "OPTION" instruction on all but the 5x family). In which case, you can add an external buffer such as a 74HC14 or maybe someone has a creative solution using the RTCC input. At any rate, the schmitt trigger is more immune to noise glitches. 2) Think for second about how a UART works. A UART divides a relatively high frequency clock to typically 16 or 32 times the data baud rate. This clock drives two state machines: the first is a filter that will remove glitches from the input, the second is a phase locked loop that synchronizes itself to the edges produced by the filter. There are obvious variations from UART to UART, and I'm also glossing over most of UART's details. The point I'm trying to make is that the UART might give us some insight on a good way to "clean up" a signal. First, note that the divided down clock provides equally spaced samples. Equal spacing means the filter's behavior will be consistant. Second, the oversampling provides some flexibility on how to design the filter. The code you posted does not have equally spaced samples. The "goto loop0" at the very bottom introduces two extra instruction cycles when the data changes from a "1" to a "0". This is easily remedied with two "NOPS" just before the LOOP1 lable. Secondly, as you noted there is ambiguity associated with glitches, i.e. your code does no filtering. O.K. I hacked my debounce algorithm to fix these two problems. The "new" routine is called "de_glitch". Once called, it continuously loops and samples PORTA<0>, filters it, outputs the filtered data PORTA<1>. "Filtered" means that the input remained quiescent for two consecutive samples. The loop time is constant at 11 instruction cycles (12 if you add the CLRWDT). Assuming you want four samples per data bit, then the relationship between the PIC clock rate and the data rate is data rate <= Fosc /(4 * 11) e.g. 9600 Baud data would require 44 * 9600 = 422kHz, not exactly a standard value. list p=16C64,t=ON,c=132,n=80,st=off radix dec include "P16C64.INC" filter_mem EQU 0x20 last EQU filter_mem current_state EQU filter_mem+1 ORG 0 ;Reset Vector GOTO Main ORG 4 ;Interrupt Vector Main BSF STATUS,RP0 ;Point to BANK 1 BSF TRISA & 0x7f, 0 ;Bit 0 is an input BCF TRISA & 0x7f, 1 ;Bit 1 is an output BCF STATUS,RP0 ;Point to BANK 0 ;******************************************************** ;de_glitch ; ; The purpose of this routine is to continuously sample porta<0> and after ;filtering, write the sample to porta<1>. Filtering in this context means ;to ignore transitions that are of the duration of a single sample. In this ;sense, the filter is low-pass and tends to remove glitches from the input. ;Like any filter, there is an associated delay; one sample in this case. ;Here are some typical input/output relationships: ; ; IN 0000011111110000000011110100000001011111111101010101011111 ; OUT x000001111111000000001111110000000001111111111111111111111 ; ;The algorithm is: ; 1) sample the input. The input is sampled every 11 instruction cycles ; 2) If there is no difference between this sample and the last one then ; 2a) Set the output (current_value) equal to the current sample ; else ; 2b) The output remains unchanged ; 3) Save the current sample as the "last" sample (for next time through) ; 4) Goto 1 ; ; Memory used ; current_state, last de_glitch CLRF last CLRF current_state L1 BCF PORTA,1 ;Clear the current state L2 MOVF PORTA,W ;Get the current sample (PORTA<0>) XORWF last,W ;W = (last sample) ^ (current sample) = diff ; note that W contains the boolean difference ; between the last sample and this sample. XORWF last,F ;last = last ^ current ^ last = current ;The "current" sample has been saved as the "last" ;Note the boolean identity: A^B^A = B ;Update the current state according to the boolean equation ; current_state = (current_state & diff) | (current_sample & diff') ; ;In english, the current_state remains unchanged if "diff" is true. Otherwise, ;if diff is false then current_state becomes the same as the current_sample ;(which just so happens to be saved already as the last sample). ANDWF current_state,F ;current_state &= diff SUBLW 0xff ;W = diff' (SUBLW 0xff complements W) ANDWF last,W ;W = last & diff' (note last == current sample) IORWF current_state,F ;boolean equation has been implemented BTFSS current_state,0 goto L1 ;Need to clear the output BSF PORTA,1 ;Current state is high GOTO L2 END Hope this helps, Scott