Scott Stephens wrote: >AN556, page 5-3, bottom, under bold heading Iterrupts states that >"...if the interrupt occurs just before the "movwf pcl" >instruction...On return from interrupt ,the program will go to the >intended offset of the table +1...a very undesirable result, so >interrupts must be disabled during a table read.." > .... >Anyone aware of this, will MPSIM handle is the way a 16C84 will? Scott: This is NOT true. Interrupts do NOT need to be disabled around table reads. As discussed at some length on the Microchip BBS, if this WERE true, interrupts would also have to be disabled around GOTOs and CALLs. MPSIM handles interrupts and PCL writes exactly as a 16C84 would. -Andy -- Andrew Warren - fastfwd@ix.netcom.com Fast Forward Engineering, Vista, California