Good Morning World,

I am working on a pulse amplifier system for a client doing medical research.
 I am using a 16C74 to configure each of the amplifier's sections (coupling,
gain, etc.) in response to commands recieved from a host computer (RS232).

My question though is in a problem I am having with the integration amplifier
of the system.  The amplifier is a TL051 FET-input op-amp with a 0.001uF cap
as feedback.  The input resistor varies from 1K to 100K to accomodate very
short (300nSec) and very long (100uSec) pulses.

I am using an SD210DE N-Channel DMOS FET accross the feedback capacitor to
reset the amplifer...it is turned on except during the desired integration
period.  This is where the problem is:
There is some charge being injected into the amplifer from the signal
controlling the transistor via internal gate-source and gate-drain
capacitances.  This results in switching spikes at the begining and end of
the integration period.  This is unacceptable as the output of the
integration amp is log amplified before a peak measurement is made.

The standard techniques of injecting opposite polarity charges to compensate
don't work because of the fast response of the amplifier and the 10+ nSec
propagation delay of an inverted signal.  This results in a non-perfect
overlapping of the signals and therefore incomplete cancellation.

Does anyone have any suggestions???

Sorry for the long-winded note, but I am out of ideas and in need of advice.
 Thanks in advance.

*****************************************
Mark A. Corio
Rochester MicroSystems, Inc.
200 Buell Road, Suite 9
Rochester, NY  14624
Tel:  (716) 328-5850
Fax:  (716) 328-1144
e-mail:  Mcorio@aol.com

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