>The programmer would only work when I had a logic probe drawing power from
>ground and pin 14. Is this an added capacitance/resistance or both?
>A solution that worked turned out to be placing a .1uF cap between ground
>and MCLR????<-don't know what that has to do with the logic probe, but
>it worked.

I dont know which software did you use with Eriks programmer.

If it was ours than problem could be that you didnt fit in the 100 uF!
It is _required_ to be 100uF, as we are generating a virtual low pulse
on MCLR after VCC is settled to +5 Volts, for the correct program mode
entry it is required MCLR to be at low level whilst device is powered.

Our driver may also work without 100uF capacitor, in that case a
small cap on MCLR pin would be required to delay MCLR.

We didnt check that possibility and adopted our driver to be fully
compatible with the original schematics by Erik

We have done at least 100 Program/Verify cycles with the schematics
as on our WWW, it works fine (in Windows 95 DOS box)

PS for those who are interested in Win 3.1 drivers for this
programmer, they will be available next week.

antti

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-- Antti Lukats                          Silicon Studio --
-- sis@rasi.lr.ttu.ee                    PO Box 3500    --
-- ftp://rasi.lr.ttu.ee/pub/sis          Tallinn EE0001 --
-- http://rasi.lr.ttu.ee/~sis            Estonia        --
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