>Hi
>
>I'm trying to design a digital noise generator. Horowitz and Hill have one
>based on a MM5437 which seems to be no longer available. However, I seem to
>recollect that someone has produced a solution based on a PIC. Can anyone
>enlighten me ??
>
>TIA
>
>Nick
>
>

Some days ago, there appeared the following contribution to the piclist.
It describes generating pseudo noise with a PIC - see below.

As Henry Carl Ott stated earlier, it seems to be some overkill to use a PIC for
that simple algorithm. You can build up such a noise generator with some
shift registers, exor-gates and an additional or-gate, too:
Take a 16bit shift-register (or a chain of two 8bit-ters), serial in, parallel
out, connect adequate register bits to exor-gates (this is equal to
calculating the parity) and use the output (=parity) as the new input for
the shift regs. Clock the shift reg. at the desired frequency (well above
20 kHz for 'acoustic white' noise). Use one of the shift register bits as the
white noise output. If the content of the shift reg. is 00000000 00000000, then
no noise will be generated. So add an OR-gate between shift input and exor
output, to be able to start the noise generator.

Now the old message:
=========================================================================
Date:         Fri, 2 Jun 1995 03:07:34 +0600
From:         Mike Keitz <mkeitz@BEV.NET>
Subject:      Re: Microchip - Shift-Registers - Suggestion

[deleted]

Here's my first crack at a chip generator, with speed as the only priority.
This should make a lot of noise on Port B, using the standard {17,14} sequence.

; Spread Spectrum sequence generator.
;  Implements a 17-stage shift register with feedback from the 14th and 17th
;  stages.  8 bits of the shift register are output to port B, which must be set
;  as all output.  Any one pin of Port B will output the PN sequence.

start
        movlw   0
        tris    PORT_B          ;Make B all output.
        movlw   1               ;Constant used since C is bit 0 of status reg.
        movwf   srgl            ;If SR contains all 0's, generator will jam.
pnlp
        rlf     srgl,1
        rlf     PORT_B,1
        btfsc   PORT_B,6        ;14th bit.  If it is 1,
        xorwf   srgl,1          ;invert the new bit.
        goto    pnlp

This takes 6 cycles per chip, so it should belt out 833.333 Kchips/sec with
a 20 MHz clock.  I think there may be a way to re-write it to 5 instructions
per chip, but I'll leave that for someone else.  Considering that three
discrete IC's costing about $0.50 could do the same job at 50 MHz, it is not
a very good application for a PIC.  But the concept is there anyway.  The
PIC is fast and smart.  Discrete logic, FPGAs, etc. are VERY fast but dumb.
Making spread spectrum chips is a "dumb" process.

[...]

Disclaimer:  All code examples are untested and may contain minor or major
bugs.  Use this information at your own risk.  I do NOT work for Microchip
or have any association with them other than as a customer.

-Mike
=========================================================================