>From:         Charles Manning <manningc@NZ.DIALOGIC.COM>
>* Ensuring correct start bit detection. The stop bit is high and the
>next start bit is low, thus providing a reliable transition.

I just finished my first project on PIC programming, a serial in/out
library.  During my testing it became apparent to me that my Mac uses
a level '1' (-12Volts) as the quiescent RS232 level.  Start bits are
'0' (12Volt), and the data bit is normal (thus an ASCII 'U' is
01010101, LSB sent first).  After that I see a '1' as stop bit, and
the line remains at the quiescent level of '1'.

Can anyone confirm this?

I went ahead and implemented my RS232 to match the above discription,
and the routines now work just fine.

>From:         Bryan Crotaz <b.crotaz@IC.AC.UK>
>Problems occur if the routine happens to be called on the transition
>edges of the data.  I`m already using the edge trigger bit on RB0 for

In my system, I setup the RTCC to get me 19,200 interrupts/sec.  I am
thus able to sample a 9600 bit/sec stream twice per bit.  As you pointed
out, this may lead to cases where the PIC samples at the transition of
a bit.  I have not seen this happen during testing.  If needed, I can
change the routines to three interrupts per bit to guarantee sampling
away from an edge.

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