> The suggestion of a DS1231 is a good one, but......

OK - there has been a misunderstanding - the problem I'm having is with
Vdd not starting at 0V.  I have an RC circuit to delay the reset line and
I think that my problem is with Vdd.

>From the 1993 "Microchip Data Book", on page 2-25.  In the bottom right-hand
corner, the paragraph reads:

"To summarize, the on chip power-on reset is guaranteed to work if the rate
of rise of Vdd is no slower than 0.05V/ms.  It is also necessary that the
Vdd start from 0V."

This DOES seem to hold true for what I am doing.  If I reduce my Vdd to 3
volts, the uC stops functing.  I can then increase to 5V and ramp up reset
through an RC network and it does not reset correctly.

--

            -- Paul Greenwood --  (pablo@austin.ibm.com)

The Crown is full of it!
                -- Nate Harris, 1775