On Thu, 10 Nov 1994, Paul Greenwood wrote:

> > If you do not have to access the data very fast you could also "expand"
> > the number of I/O lines by adding serial-parallel shift registers to
> > use as the address lines for the memory. This would let you use just 2
> > or 3 pins on the PIC to create 8, 16, 24, ...? address lines as needed.
> > The penalty is you have to shift the address out to the memory before
> > each read or write. This is a useful technique for using any micro in
> > apps that need lots of digital I/O when extreme speed is not required.
>
> Yeah, I've chosen to use latches on a semi-bus-based system.  Good idea
> though, I think that the latches will be faster.  I can use 8-bits as a
> my bus and then use the other pins for selecting latches and doing misc.
> control functions to some of the chips.
>

I have used latches as well but have gotten to where I like the
shift registers better since you can do all the I/O for dozens of
I/O pins using the same 2 or 3 "real" I/O lines on the processor.
That still leaves you some real pins, even on something like the
16C54 that has just a few lines.

Tim McDonough -- timmed@cencom.net