TO: Scott Colson, INTERNET:colsons@IIA.ORG Re: Re:Help with 16C84 data EEPROM >I've tried everything I can think of to access and test the PIC's data >EEPROM. If there is an experienced 16C84 programmer that can find any >problems in my code (The offending code follows this plea), I would sure >like to know what I'm doing wrong. Scott - this code works. It is written in ASPIC. WARNING - ASPIC HANDLES REGISTER BANKING: you will need to add that in your code! This assumes that you have included the segment managemant macros (SEGMACS.ASI), and the default segment definitions in (PICMACRO.ASM). (We first need to generate overriding bit labels for EECON1 bits if we are compiling with 5.32, Registered users with 5.33beta or later need not worry about this) .seg REGS2 ;bank 2 register area .ds 1 OPTION: .ds 1 ;option register OPTINIT_NP = %10001000 ;Option for no PORTB_PULLUP OPTINIT = %00001000 ;default OPTION register ;|||||||| ;|||||||+---- \ ;||||||+----- |- Prescaler exponent ;|||||+------ / ;||||+------- PSA : Prescaler dest - 1=WDT, 0=RTCC ;|||+-------- RTE : RTCC edge - 1=v 0=^ ;||+--------- RTS : RTCC Source 1=EXT 0=INT ;|+---------- INTEDG : INT (RB0) Edge - 1=^ 0=v ;+----------- RBPU : Port B weak pullup enable 0=on .ds 3 ;PCL,STATUS,FSR image TRISA: .ds 1 TRISB: .ds 1 .ds 1 ;(tris C) ;*************************************************************************** ;** EECON1 ;** *** DANGER *** WE NEED TO RE-DEFINE THE EECON1 BITS TO FIX A BUG IN ;** ASPIC 5.32! **DO NOT USE THE INTERNAL DEFINITIONS!!! ;** ;*************************************************************************** EECON1: B.RD = 0,* ;EEPROM READ B.WR = 1,* ;EEPROM WRITE B.WREN = 2,* ;WRITE ENABLE B.WRERR = 3,* ;Write error flag B.EEIF = 4,* ;EE write complete interrupt flag .ds 1 ;EECON1 .seg CODE ;general code area ;*************************************************************************** ;** EE_READ - read EEPROM address in W ;** Return the contents of the EEPROM location in W ;** returns the value in W ;** ;** Data is stored in EEPROM in 1's compliment to increase the 1's density ;** This increases the life of the EEPROM ;** ;** Preserves ALL TEMPS (ASPIC takes care of all of the register banking!) ;** ;*************************************************************************** EE_READ: CLRWDT ;reset watchdog timeout ..loop: BTFSC B.WR ;wait for previous write to end goto ..loop MOVWF EEADR ;set address SEB B.RD CLRWDT MOVFW EEDATA ;get eeprom data XORLW $FF ;flip bits return ;w=EEPROM DATA ;*************************************************************************** ;** EE_WRITE - Write W to the EEPROM location in TEMP ;** ;** returns the value in W ;** ;** Data is stored in EEPROM in 1's compliment to increase the 1's density ;** This increases the life of the EEPROM ;** ;** The location is read first and is not written if the contents have not ;** changed. ;** ;** Preserves W and all TEMPS ;** ;*************************************************************************** EE_WRITE: CLRWDT ;reset watchdog timeout ..loop: ; BTFSC B.WR ;wait for previous write to end goto ..loop; ; MOVWF EEDATA ;set data MOVFW TEMP ; MOVWF EEADR ;set address MOVFW EEDATA ;GET data back SEB B.RD ;initiate READ XORLW $FF ;flip bits to improve endurance XORWF EEDATA ;CHECK if data is the same BZ eew_x ;data is the same, don't write MOVWF EEDATA ;set data to write SEB B.WREN ;make sure write is enabled movlw $55 ;** MAGIC NUMBER FOR EE WRITE clb GIE ;disable interrupts movwf EECON2 ;\****************************** movlw $AA ; \ MAGIC CODE movwf EECON2 ; / DO NOT CHANGE bsf B.WR ;/****************************** movfw EEDATA ;restore W eew_x: XORLW $FF ;flip bits retfie ;RETURN and re-enable INTS - Don