Easy. Even without having to use PIA or UART. Use the asynchronous bus feature of 68k.

Have 2 PIC pins configured to sample the state of /CS (from decoder) and R/W (from 68k)
Have 1 PIC pin to drive the /DTACK (with OC driver). And have the PIC to place/read the data on 
the bus at appropriate times. Note that your 68k will wait until it detects /DTACK asserted. The 
danger is of course that if the PIC is not programmed properly in its response to 68k requests, so 
that /DTACK never gets asserted in this bus cycle, then the system dies. 

Cheers
Jianfeng