This register is a register for the timer1 count. A maximum of 65535 counts can be set.
TMR1L for low byte and TMR1H for high byte.
Two registers are combined and works as a 16 bits register. The time-out interruption occurs when overflowing(FFFFh to 0000h) in the count with timer1.
This timer can be independently used, but it is possible to use for the capture or compare mode of CCP feature.
T1CON ( Timer1 control register ) 10h This register controls the condition of Timer1. The value in the parenthesis is in the condition immediately after the turning on.