Chuck's Scenix Toolbox

Development tools for Scenix Micro-Controllers

Copyright © 1998 Charles E. Glenn

These works may be re-distributed freely only if not altered in any way. For the latest version, check the web at "http://members.aol.com/~glennce".

Warning: These programs work on Windows 95 / 98 computers only.

This version produced December 3, 1998.

MicroChip® and PIC® are registered trademarks of MicroChip, Inc.

Scenix® and SX® are registered trademarks of Scenix, Inc.

Delphi® is a registered Trademark of Borland International.

Parallax® is a registered Trademark of Parallax Inc.

All other trademarks are the property of their respective companies.

Table of Contents

Introduction	3

The Assembler	4

Included (and excluded) Features	4

Assembler Input and Output	6

Instruction set	7

Running the Assembler	12

Sample ASM files	12

The Simulator	13

Main Window	14

Basic Port Window	15

Full Port Window	15

File Registers Window	15

Stopwatch Window	15

Control Registers Window	15

Config Registers Window	16

Run-time Warnings Window	16

Test Files	16

The Programmer	18

Bug Fixes, Modifications	19

To Do...	20

Introduction

The Scenix processors are the next step in the "smaller, faster, cheaper" world of micro- controllers. Although they are closely based on the PIC16C5x series from MicroChip, they offer many advantages. To me, the most important advantages were price, speed and Flash EEPROM program memory. I bought several of them before realizing that my existing PIC programmer would not program them.

I didn't feel like paying for the limited, pricey options that existed in September, 1998. So... I read the documentation, worked real hard, and came up with the least painful way to do it all myself. Everything in this package, the Assembler, the Simulator, and the Programmer hardware and software, is based on the specifications found in the Scenix "SX" Manual. All software and hardware in this package were written and designed, from scratch, using only the information found in the Scenix documentation. You can (and should!) download the manual yourself from Scenix's web site: "http://www.scenix.com".

You may also want to download some documents from MicroChip's web site: "http://www.microchip.com". Their documentation is much more thorough technically (which is a blessing for engineers and a possible curse for novices). The documents for the PIC16C5x family are most relevant, since the SX is most closely based on this series.

You may notice that the sample programs contain syntax similar to the Microchip PIC16C5x, as opposed to the syntax shown in the Scenix documentation. That's only because I personally prefer the MicroChip-style syntax. It's clearer to me. It's easier to assemble (one mnemonic per opcode), and it reads left to right "move W to F"as "MOVWF", as opposed to right to left as in "MOV fr, W". Personally, I remember each instruction saying it aloud.

As of 12/1/98, the Assembler can assemble the Scenix-style syntax, as long as your ASM file is written carefully. Some of the Scenix-style mnemonics use specific parameters, such as "W", "!OPTION", "PC+W" or "!RA", or they use special prefixes or suffixes, such as prefixes "#", "/", or ">>", or the suffix "-W". When prefixes or suffixes are used, they must appear preceding or following the parameter with no spaces. If you leave spaces, the Assembler will interpret the pieces as multiple words. Then probably tell you you have too many parameters, or that you have not followed the expected pattern for the opcode.

With MicroChip-style syntax, the Assembler does not need to analyze the parameters in order to determine the appropriate instruction. Instead, each actual machine instruction has a single mnemonic, without exception. So... I'm lazy. In my own humble opinion, it also leads to fewer incorrectly typed commands making it cleanly through the Assembler.

I hope you find the software and the documentation useful and helpful. If not, I'm very willing to take politely-worded suggestions from the field. Just e-mail me at "ChuckGlenn@Earthlink.net". If you ask, I can send notification when product updates are available for download. I do not, and will not, sell or otherwise distribute e-mail addresses to third parties, except as requested or directed by the owner of the e-mail address.

The Assembler

The Assembler is not very pretty to look at. It simply allows you to open an ASM file, and it compiles it into a LST file and a HEX file. The LST file serves as a listing for you, and as the input file for the Simulator. The LST file will contain a summation of all of the equates (replacement names specified via EQU instructions), all your lines of code, and any warnings or errors issued by the Assembler. Note that warnings and errors appear ahead of the line of code to which they refer.

To create an ASM file that will assemble successfully, you need to be aware of the following features, and the omission of some features present in other assemblers.

Included (and excluded) Features

A semi-colon ";" on any line signifies the end of that line for purposes of assembly. As such, comments can be placed to the right of a semi-colon on any line, and the assembler will not parse or interpret the contents of the line. If you need to insert a literal semi-colon as an ASCII byte value, use a numeric literal of "$3B" or "59" instead.

Numeric values can be represented as decimal (the default), or hexidecimal or binary. Hexidecimal number can be indicated by either "0x" or "H'" as the first two characters, "$" as the first character, or "H" or "h" as the last character where the first character is a digit. Binary numbers can be indicated by either "0b" or "B'" as the first two characters or "B" or "b" as the last character where the first character is a digit. Any other literal with a digit as the first character is assumed to be a decimal number, and non-numeric characters imbedded therein are ignored. You can not use an equated name that begins with a digit – the Assembler will interpret this as a numeric literal. ASCII character literal values can be indicated by an apostrophe (') as the first character.

Spaces, periods (.) and commas (,) are considered "white space" by the Assembler. The Assembler parses each line, assuming that the individual words are separated by one or more white-space characters.

The EQU directive allows you to define names to replace what would normally be coded as numeric values. Since most people remember names much better than numbers, I suggest using equated names liberally. For example, you can substitute the word "PORTA" anywhere in your code where you would normally need to specify "$05" or "5".

The ORG directive changes the internal "program memory address" where instructions will be placed. ORG directives cannot be named. You can, however, use a formerly equated (EQU) value as the one parameter of ORG. For instance,"Reset EQU $7FF" and "ORG Reset" are equivalent to "ORG $7FF".

You can include files, nested ridiculously if you wish (I used a recursive routine for this). Use good judgement, though! You should always include one of the "header" files, either "C:\Program Files\Scenix\includes\sx18.inc" or "C:\Program Files\Scenix\includes\sx28.inc". These contain equated names for ports and registers, for specific bits within the registers, and for configuration locations and settings.

Data space allocation directives, like (DB, DS, etc) will not work. I currently have no intention of adding them, since there are only 136 bytes of variable memory (RAM).... The IREAD instruction allows read-only tables to be placed in program memory, and is a good replacement for hard-coding of long strings to be transmitted.

I have included a simple directive, MEM, to allow for the insertion of a single 12-bit value into the next available program memory location. This feature is exploited in order to load FUSE and FUSEX values (since they are values, not opcodes, that get put into specific program memory locations). You may also use this feature to load read-only tables into program memory, to be retrieved at run time using the IREAD instruction.

Expressions may appear anywhere that a value would appear: following the EQU or MEM directives, or as a parameter following an opcode. You can do bitwise AND (&), bitwise OR (|) and addition (+) and subtraction (-) operations, as well as sets of parentheses to dictate order of operation. You must follow these simple rules:

Each operator character, and each parenthesis, must be preceded and followed by a space, so that the assembler recognizes them as separate tokens and words.

Each operator must be preceded and followed by a number, or an expression that will resolve to a number.

Comparators ( greater than, equal to, etc.) have not been implemented.

Logical operators ( logical AND, OR ) have not been implemented.

Branch labels can be entered on a line by themselves, or as the first word of a line containing an opcode and its parameters. The Assembler uses the same table internally to store branch labels and equated names. If you use an equated name and a label name of the same value, unexpected results will occur.

Names of equated values and branch labels are case insensitive, so that "Name", "name", and "NAME" are all recognized as the same branch label or equated name. Names may begin with any non-numeric sequence of characters except for a white-space characters (period, comma or space). Make sure that at least one white-space character separates all of the words and/or tokens within a line (tokens are the &, |, + and - characters).

Conditional assembly is allowed, using IFDEF, IFNDEF, ELSE and ENDIF directives. These can be nested up to 10 levels deep, regardless of any INCLUDEs. After the 10th level, you'll get error messages. You can only evaluate one single equated name in an IFDEF or IFNDEF statement.

I have not implemented the END directive. For those that think this is critically important: Sorry, but I disagree. For these tools, the end-of-file is the end of the source code.

For all other Assembler features, if I don't specifically mention it, it won't work. This Assembler was written from scratch. Although it may grow with time, it has the basics only. Specific features that are not yet present include: the DEFINE directive, conditional assembly based on full IF expressions (IFDEF and IFNDEF only) macros, fake relative branching using "$ + 2" or "$ - 32" (hey... just use labels).

Although the LIST and NOLIST directives are present (with no parameters), they are ignored. This is because the Simulator uses the LST file extensively, and all of the code needs to be listed so that the Simulator will work correctly.

The Assembler is a two-pass assembler. On the first pass it computes the memory locations of branch labels. On the second pass, it does all the other work. I'm not sure why you might need to know this... It might explain your problem if you do something really off-the-wall with branch labels. I've tried to make this effective for all scenarios I can envision, but people do some really "creative" things sometimes.

Assembler Input and Output

The Assembler reads ASM files, and creates LST and HEX files as the result. The HEX files are the same format as produced by the MicroChip assembler: Intel HEX8 format, as follows:

Each line is the following format "nn aaaa cc dddd .... dddd ss" where:

"nn" is the number of bytes (i.e. number of "dddd" times 2)

"aaaa" is the memory address * 2

"cc" is the command: "00" for continue, "01" for stop

"dddd" is the data, shown in Least Significant Byte/Most Significant Byte order

"ss" is a twos-complement of each byte in the line, including the "nn", first and second half of "aaaa", etc.

Note that all digits are hexidecimal, and that no spaces appear between any digits and values. Spaces shown in the above example are for clarity only.

Instruction set

The next page shows the opcodes, parameters, parameters maximum values, and parameter defaults, along with the bit pattern of the opcode itself. If you have downloaded the MicroChip or Scenix documentation, both contain similar-looking tables. Since the Assembler only understands MicroChip-style opcodes, and since the instruction set in the Scenix chips is a super- set, I have invented MicroChip-style opcodes and syntax for certain instructions.

The next page contains a table of the specific opcodes and syntax understood by the Assembler. Both the Simulator and the Programmer don't know or care about the syntax. Both operate using the numeric representations in the LST or HEX files. When the Assembler is updated to understand a different style of opcode and syntax, the Simulator and Programmer do not need to change.

opcode and	# of	parm1	parm2	parm2	instruction	cycles	flags

syntax	description	parms	max	max	deflt	bit pattern	Co	Tu	effected

=============	===================================	=====	=====	=====	=====	==============	========	========

ADDWF f [,d]	Add fr and W, result to f or W	1-2	31	1	1	0001 11df ffff	1	1	C, DC, Z

ANDWF f [,d]	AND fr and W, result to f or W	1-2	31	1	1	0001 01df ffff	1	1	Z

ANDLW k	AND W and literal, result to W	1	255	0	0	1110 kkkk kkkk	1	1	Z

BANK n	Load Bank Number into FSR(7:5)	1	255	0	0	0000 0001 1nnn	1	1

BCF f, b	Clear Bit b in f	2	31	7	0	0100 bbbf ffff	1	1

BSF f, b	Set Bit b in f	2	31	7	0	0101 bbbf ffff	1	1

BTFSC f, b	Test bit b in f; skip if clear	2	31	7	0	0110 bbbf ffff	1/2 1/2

BTFSS f, b	Test bit b in f; skip if set	2	31	7	0	0111 bbbf ffff	1/2 1/2

CALL k	Call Subroutine	1	255	0	0	1001 kkkk kkkk	2	3

CLRF f	Clear f	1	31	0	0	0000 011f ffff	1	1	Z

CLRW	Clear W	0	0	0	0	0000 0100 0000	1	1	Z

CLRWDT	Clear Watchdog Timer	0	0	0	0	0000 0000 0100	1	1	TO, PD

DECF f [,d]	Decrement f, result to f or W	1-2	31	1	1	0000 11df ffff	1	1	Z

DECFSZ f [,d]	Dec f, res to f or W; skip if zero	1-2	31	1	1	0010 11df ffff	1/2 1/2

GOTO k	Go to Address	1	511	0	0	101k kkkk kkkk	2	3

INCF f [,d]	Increment f, result to f or W	1-2	31	1	1	0010 10df ffff	1	1	Z

INCFSZ f	Inc f, res to f or W; skip if zero	1	31	1	1	0011 111f ffff	1/2	1/2

IORWF f [,d]	OR W and f, result to f or W	1-2	31	1	1	0001 00df ffff	1	1	Z

IORLW k	OR W and Literal, result to W	1	255	0	0	1101 kkkk kkkk	1	1	Z

IREAD	Read from Instruction Memory	0	0	0	0	0000 0100 0001	1	4

MOVFW f	Move f to W	1	31	0	0	0010 000f ffff	1	1	Z

MODE k	Move literal to MODE Register	1	15	0	0	0000 0101 kkkk	1	1

MOVLW k	Move literal to W	1	255	0	0	1100 kkkk kkkk	1	1

MOVWM	Move W to MODE Register	0	0	0	0	0000 0100 0011	1	1

MOVWF f	Move W to f	1	31	0	0	0000 001f ffff	1	1

MOVMW	Move MODE Register to W	0	0	0	0	0000 0100 0010	1	1

MOVWO	Move W to OPTION Register	0	0	0	0	0000 0000 0010	1	1

TRIS r	Move W to port control register	1	3	0	0	0000 0000 0fff	1	1

NOP	No Operation	0	0	0	0	0000 0000 0000	1	1

NOTF f [,d]	Complement f, result to f or W	1-2	31	1	1	0010 01df ffff	1	1	Z

PAGE n	Load Page Number into STATUS(7:5)	1	7	0	0	0000 0001 0nnn	1	1

RETURN	Return from Subroutine	0	0	0	0	0000 0000 1100	2	3

RETI	Return from Interrupt	0	0	0	0	0000 0000 1110	2	3	all

RETIW	RETI; Subtract W from RTCC	0	0	0	0	0000 0000 1111	2	3	all

RETP	Return; set Page back	0	0	0	0	0000 0000 1101	2	3

RETLW k	Return with Literal in W	1	255	0	0	1000 kkkk kkkk	2	3

RLF f [,d]	Rotate f Left, result to f or W	1-2	31	1	1	0011 01df ffff	1	1	C

RRF f [,d]	Rotate f Right, result to f or W	1-2	31	1	1	0011 00df ffff	1	1	C

SLEEP	Power Down Mode	0	0	0	0	0000 0000 0011	1	1	TO, PD

SUBWF f [,d]	Subtract W from f, res to f or W	1-2	31	1	1	0000 10df ffff	1	1	C, DC, Z

SWAPF f [,d]	Swap Nibbles f, result to f or W	1-2	31	1	1	0011 10df ffff	1	1

TESTF f	Test f	1	31	0	0	0010 001f ffff	1	1	Z

XORWF f [,d]	XOR W and f, result to f or W	1-2	31	1	1	0001 10df ffff	1	1	Z

XORLW k	XOR W and Literal, result to W	1	255	0	0	1111 kkkk kkkk	1	1	Z

Notes in regard to the Opcode and syntax table:

Syntax containing "[,d]" indicates that the second parameter may be omitted, causing the Assembler to assume the default (shown in column labeled "parm2 deflt"). if d = 0, the result is stored back to W. If d = 1, the result is stored back to the file register.

Syntax containing "b" indicates that the second parameter specifies a bit number, from 0 to 7, representing the rightmost to leftmost of the 8 bits in the register.

Syntax containing "f" indicates that the first parameter specifies a memory location between 0 and 31 (hexidecimal $00 to $1F). To access any file register, you must also specify the bank (0-7) in the three leftmost bits of the FSR register. This is most easily accomplished using the BANK instruction.

Syntax containing "k" indicates that the first parameter is a literal value. Refer to the column labeled "parm1 max" to determine the maximum allowable literal value.

The Assembler does special error checking for the TRIS instruction, to insure that the first parameter "r" is either 5, 6 or 7 only.

The Assembler does special post-processing for the BANK instruction, to insure that the value of the first parameter "n" is 0 through 7. You can also specify $20, $40, $60, $80, $A0, $C0, or $E0, in which case the post-processing logic divides by $20 (32) to get a number from 1 through 7.

The Assembler does special post-processing for the PAGE instruction, to insure that the value of the first parameter "n" is 0 through 4. You can also specify $200, $400, or $800, in which case the post-processing logic divides by $200 (512) to get a number from 1 through 4.

The following page contains the list of opcodes and syntax as shown in the Scenix documentation. This is to allow someone familiar with the Scenix-style opcodes to write using Microchip-style syntax as used in the sample files.

The assembler was originally written to recognize only the MicroChip-style syntax shown in the previous table. The Scenix-style syntax was added to the Assembler later. In order to not impact the rest of the program greatly, I implemented the Scenix-style syntax by including a small routine to analyze the line and translate it from the Scenix-style to the MicroChip-style, then continue on as usual. When an error or warning is issued on a line containing a scenix-exclusive syntax, you will first see a message telling you what it was translated to, then the actual error or warning message. This might help you to determine the problem... Based on the Assembler mangling things in the translation. If you follow the syntax guidelines in the Scenix documentation, and you do not have any extra white-space characters between a parameter and its prefix or suffix, everything should work. When it doesn't, the translation message and the descriptive error or warning message should be sufficient to point to the problem.

Scenix-style	MicroChip-

syntax	description	style syntax

===============	=================================	=============

ADD fr,W	Add W to fr	ADDWF f

ADD W,fr	Add fr to W	ADDWF f, W

AND fr, W	AND of fr and W into fr	ANDWF f

AND W, fr	AND of W and fr into W	ANDWF f, W

AND W,#lit	AND of W and Literal into W	ANDLW k

BANK addr8	Load Bank Number into FSR(7:5)	BANK n

CALL addr8	Call Subroutine	CALL k

CLR WDT	Clear Watchdog Timer	CLRWDT

CLR fr	Clear fr	CLRF f

CLR W	Clear W	CLRW

CLRB fr.bit	Clear Bit in fr	BCF f, b

DEC fr	Decrement fr	DECF f

DECSZ fr	Decrement fr; Skip if Zero	DECFSZ f

INC fr	Increment fr	INCF f

INCSZ fr	Increment fr; Skip if Zero	INCFSZ f

IREAD	Read Word from Instruction Memory	IREAD

JMP addr9	Jump to Address	GOTO k

MOV !OPTION, W	Move W to OPTION Register	MOVWO

MOV !rx,W	Move W to Port Rx Control Reg	TRIS r

MOV fr,W	Move W to fr	MOVWF f

MOV M,#lit	Move Literal to MODE Register	MODE k

MOV M,W	Move W to MODE Register	MOVWM

MOV W,#lit	Move Literal to W	MOVLW k

MOV W,++fr	Move (fr+1) to W	INCF f, W

MOV W,--fr	Move (fr-1) to W	DECF f, W

MOV W,/fr	Move Complement of fr to W	NOTF f, W

MOV W,<<fr	Rotate fr Left and Move to W	RLF f, W

MOV W,<>fr	Swap Nibbles of fr and move to W	SWAPF f, W

MOV W,>>fr	Rotate fr Right and Move to W	RRF f, W

MOV W,fr	Move fr to W	MOVFW f

MOV W,fr-W	Move (fr-W) to W	SUBWF f, W

MOV W,M	Move MODE Register to W	MOVMW

MOVSZ W,++fr	Move (fr+1) to W; Skip if Zero	INCFSZ f, W

MOVSZ W,--fr	Move (fr-1) to W; Skip if Zero	DECFSZ f, W

NOP	No Operation	NOP

NOT fr	Complement of fr into fr	NOTF f

OR fr,W	OR of fr and W into fr	IORWF f

OR W,#lit	OR of W and Literal into W	IORLW k

OR W,fr	OR of W and fr into W	IORWF f, W

PAGE addr12	Load Page Number into STATUS(7:5)	PAGE n

RET	Return from Subroutine	RETURN

RETI	Return from Interrupt	RETI

RETIW	RETI; Adjust RTCC with W	RETIW

RETP	Return fcross Page Boundary	RETP

RETW lit	Return with Literal in W	RETLW k

RL fr	Rotate fr Left through Carry	RLF f

RR fr	Rotate fr Right through Carry	RRF f

SB fr.bit	Test Bit in fr; Skip if Set	BTFSS f, b

SETB fr.bit	Set Bit in fr	BSF f, b

SLEEP	Power Down Mode	SLEEP

SNB fr.bit	Test Bit in fr; Skip if Clear	BTFSC f, b

SUB fr,W	Subtract W from fr	SUBWF f

SWAP fr	Swap High/Low Nibbles of fr	SWAPF f

TEST fr	Test fr for Zero	TESTF f

XOR fr,W	XOR of fr and W into fr	XORWF f

XOR W,#lit	XOR of W and Literal into W	XORLW k

XOR W,fr	XOR of W and fr into W	XORWF f, W

For illustrative purposes, I have used upper-case letters and symbols for parts of the syntax that must appear as shown. In your use of the syntax, the lower-case letters should be replaced by equated names, label names, or literal values. Do not insert white-space characters between the symbolic prefixes or suffixes and the name or value.

Alternative forms, and embellishments taken by me

I thought it was odd to use "M" for the mode register, but "!OPTION" for the option register. Since I'm sure I'd do it wrong constantly, I also allow the word "!MODE" to appear in any of the above syntax where "M" appears.

Alternatives as shown in the Scenix documentation, and how they are translated into MicroChip- style syntax during assembly:

Scenix-style

instruction	translated to

============	==================

CLC	BCF STATUS, C

CLZ	BCF STATUS, Z

JMP W	MOVWF PCL

JMP PC+W	ADDWF PCL

NOT W	XORLW $FF

SC	BTFSS STATUS, C

SKIP	BTFSS PCL, 7

- or -

BTFSC PCL, 7

Note that parameters "W" and/or "PC+W" must appear exactly as illustrated. Please refer to the Scenix documentation for more details about these alternative opcodes.

Running the Assembler

The Assembler should have been copied to your system as "C:\Program Files\Scenix\SxAsm.exe". If it is not present, you have not installed it correctly. If you have installed the files to another directory, you should change your copy of this document to reflect the correct directories.

The Assembler is not must to look at. It is a single window, with some text fields and two buttons. The "open" button is used to open and assemble an ASM file. You can leave the Assembler open, and use the "retry" button to re-read and re-assemble the same file. This allows you to correct errors and make revisions to your Assembler file, and not go through the entire "open" process each time.

If any errors were found, you should use your editor (or WordPad, if you like) to view the LST file. This will contain your Assembler code, along with errors and warnings. Note that errors and warnings will precede the line to which they apply.

Sample ASM files

To test the Assembler, I wrote some sample ASM files. You can find these in the directory where the software components exist, usually "C:\Program Files\Scenix\". The following ASM files were written for the following reasons:

TEST.ASM -contains every variant of every opcode, including anything that should trigger a warning or error. This file insures that the assembler is correctly parsing, checking for number of parameters, checking parameter maximum values, defaulting parameters, right-truncating parameters (such as registers higher $1F), etc.

CLEAN.ASM - same as TEST.ASM with all of the error-causing lines removed.

TEST5.ASM - tests for new syntax features: using expressions anywhere; assigning EQU values during first and second passes, so that use of equated values is in-line with setting of values, parentheses within expressions, IFDEF, IFNDEF, ELSE, ENDIF conditional assembly directives.

You will also see other ASM files in this directory. Most were written in order to test the Simulator.

The Simulator

The Simlulator was written in Borland Delphi 3.0 and Object Pascal. It has the main window, which shows source code, and several other windows that can be opened, closed and positioned as needed. It works best at 1024 x 768 screen resolution. I plan to add "font selection" in the near future, so it can be customized more to fit your preferences.

The main window shows a portion of a LST file, which the assembler creates during assembly. The assembler puts machine instructions, in the format "aaaa:cccc" in columns 1-9 of specific lines, and it shows the original source line starting in column 16. "aaaa" represents the program memory address, in hex. "cccc" represents the machine code in hex. These are always four hexidecimal digits each. The format of the LST file makes it easy for the simulator to match source code to machine code. The Simulator's main window shows the contents of the LST file, but only between the "Pass 2: Assemble Opcodes" line, and the "EQUATED VALUES:" line. It also skips showing error and warning lines that the Assembler may have output.

The main windows serves the following purposes:

It shows the source code, highlighting the instruction that will be performed next.

It shows any breakpoints as red lines (click on a line to toggle it on and off as a breakpoint).

It allows you to single step, step over, run and/or stop the simulation via buttons between the source code and menus.

It has the menu bar for the entire simulation.

There are several other windows, which can be toggled on and off using the "Window" menu on the main screen. You can also save and restore the positions of all windows and the sizes of sizable windows. The other windows are:

Basic Port: Shows the hex and binary values of PORTA, PORTB and PORTC, as well as the direction for each.

Full Port: Shows the hex and binary values of PortA, PortB, PortC, and all control registers available via MODE and TRIS commands.

File Registers: Shows all file registers $08 through $FF, arranged in banks.

Stopwatch: Shows the number of clock oscillations, instructions, and seconds since the beginning of the simulation (or since the Stopwatch was last "zeroed").

Control Registers: Shows special function registers (except Ports), and their associated subfields and flags.

Config Registers: Shows FUSE, FUSEX and DEVICE registers and their associated subfields and flags.

Run-time Warnings: Another text window, where the simulator can warn of unexpected, unusual, or problematic situations occurring in the simulation.

A detailed discussion of each window is found below.

Main Window

The main window consists of a menu bar, a small panel with "step" buttons, and then a text area where the source code is shown. In order to load an assembler LST file, use the "File|Open" menu. The simulator can only simulate one listing at a time. a "File|Open" will overwrite the existing contents.

You may choose to keep your editor, the assembler, and the simulator open continuously as you work on and refine your program. The assembler and simulator both have a "File|Re-open" menu choice, so you can quickly re-read the latest ASM or LST files. This allows you to make changes in your editor, save them to the ASM file, then quickly re-assemble it and load it back to the simulator.

The "Window" menu choices allow you to turn specific windows off or on, and to save and restore window positions.

The "Stimulus" menu choices allow you to simulate external events that would effect the mcu, such as a reset, a power-on, interrupts and the like. Some external events and stimulus have not yet been implemented.

The control buttons appear below the menu bar. The control buttons are "Single Step", "Step Over", "Run" and "Stop". To the right of these is a check-box to allow you suppress certain updates while in "run" mode. This may help the simulator to run faster on slower machines. To the right of the check-box, you will see the instruction about to be performed, translated from program memory back into an opcode and two parameters. For the sake of simplicity, I did not limit the number of parameters to match the opcode -- it will always show two.

The "Single Step" button executes exactly one instruction, updates all of the windows showing register values and flags, and then highlights the next instruction to be performed.

The "Step Over" button works exactly like the "Single Step" button for all but "CALL" instructions. For "CALL" instructions, the "Step Over" button will keep executing instructions as quickly as possible until it arrives at the instruction immediately following the "CALL". While the "Step Over" operation is running, you can stop it by pressing the "Stop" button. The "Step Over" operation will not stop for breakpoints. If you want to stop for breakpoints, us the "Run" button instead.

The "Run" button will cause the simulator to execute instructions as quickly as possible, until it hits a breakpoint, or until you press the "Stop" button.

The main portion of the window is a text field (more specifically, a Delphi "memo" object), showing the source code. The instruction to be performed next is "selected" or highlighted within the text. If you wish to set or clear a breakpoint, simply click on one of the lines within the text area. While you are in "run" or "step over" mode, highlighting of the next instruction is suspended if the "run visible?" check-box is not checked.

Basic Port Window

The Basic Port window shows the current hexidecimal and binary values of PortA, PortB, and PortC, and the current hex and binary values of the direction registers for each port. Using this window is redundant if you already have the "Full Port" window open. This window is not re- sizable, but you may reposition it by dragging the title bar.

Full Port Window

The Full Port window shows the current hexidecimal and binary values of PortA, PortB, and PortC, and the current hex and binary values of all internal registers associated with each port. Specific functions and effects of each register are described extensively in the Scenix documentation.

File Registers Window

The File Registers window shows file registers between $08 and $FF, shown in banks. The numbers along the left edge of the window denote the first hex digit of the memory address, followed by a dot, such as "0.", "1.", "3.". Note that rows 2., 4., 6., 8., A., and C. memory locations are not shown, since they are identical to the 0. row. The numbers along the top of the window denote the second hex digit of the memory address, preceded by a dot, such as ".0", ".1", ".2", etc. To locate memory location $37, for instance, you would look for the two-digit hex value to the right of "3." and below ".7".

When an instruction modifies one of the values on this window, it is temporarily shown in red. This allows you to see changes better when using the "Single Step" button. This feature is suspended when the "run visible?" check-box is not checked.

Stopwatch Window

The Stopwatch window shows the current oscillation and instruction counts, and the elapsed time in seconds (scientific notation). You can reset the oscillation and instruction counts, and the number of seconds, by pressing the "ZERO" button on this window.

The Stopwatch screen also contains a text field and radio buttons to allow you to set the processor speed. If your source code has configured an internal clock (FUSE._IRC), then this text field, and the related buttons, are disabled.

Control Registers Window

The Control Registers window shows the addressable registers below $05, as well as the non- addressable registers W, OPTION and MODE. Unlike the File Registers window, values on this window will not become red when changed. This window shows the hex value of each register, and for those registers that can be interpreted as subfields and/or flags, the subfields and flags are shown to the right of the hex value. Flags shown on this screen are black when 0 and red when 1.

Some subtle rules may dictate unexpected behavior. For example, writes to the OPTION register will not effect the RTW and RTE_IE bits unless the FUSE configuration has been set to disable the _OPTIONX (extended options) bit.

Config Registers Window

This window shows the FUSE, FUSEX and DEVICE registers, and their associated subfields and flags. Note that flags shown in red represent set bits (ones), and that flags shown in black represent clear bits (zeros).

Note that flag names beginning with an underline denote a "normally 1" condition, and that you turn on the related feature by clearing the bit. For example, when the _TURBO is red, you are running in "non turbo" or compatibility speed. if _TURBO is black (zero), then you are running at turbo speed.

Run-time Warnings Window

Certain conditions should not happen while the chip is running. The simulator tries to watch for these exceptions, and to warn you when they happen during simulation. For example... If your clock speed is > 37MHz, and you write to PortA in one instruction, then read PortA in the very next instruction, you will get a warning that you have read the port before it was completely written. This specific check was a "best guess" on my part, based on the information in the Scenix documentation.

To clear the contents, close and re-open the window using the "Window|Run-Time Warnings" menu choice.

Test Files

I haven't yet run anything on a Scenix mcu. I've only read the documentation and worked with PIC chips. So... at this point, I'm trying to trust the Scenix documentation, and make the Simulator work like the description of the SX chips in the documentation.

I've read the manual many times, until bleary-eyed. I've tried to implement each feature properly. In an attempt to insure that the simulator is doing what it should, I've written a file to test each instruction, and some other files targeted toward specific features and instructions.

CLEAN.ASM has each instruction, with and without optional parameters. This test the Assembler and the Simulator.

TEST2.ASM uses upper banks of the file register to make sure the File Register screen updates correctly.

TEST3.ASM tests the IREAD instruction, and the MOVMW and MOVWM instructions...

TEST4.ASM was used to check the bitwise operations, and addition and subtraction, to make sure each operation return the expected result and set or cleared the appropriate STATUS flags.

TEST5.ASM was used to check the extended port control registers, using MODE and TRIS combinations, and to check for stack overflow, and to check INCFSZ and DECFSZ behavior.

TEST6.ASM was used to validate the results of in-line expressions, and to minimally test the IFDEF, IFNDEF, ELSE and ENDIF directives.

TEST7.ASM tests each Scenix-style syntax opcode, following its MicroChip-style equivalent. You can verify the machine code shown next to each pair of parallel instruction by looking at TEST7.LST.

...and I'm still writing these.

If you find features that have been mis-interpreted by me, and/or implemented incorrectly in the simulator, please notify me immediately. Send a sample ASM file in an e-mail to ChuckGlenn@Earthlink.Net and include an explanation of what you think the simulator should be doing, versus what it is currently doing.

The Programmer

Sorry folks! I have to design the hardware first... and this is not my area of expertise.

I'm planning to make a programmer out of a 28-pin PIC, in order to program the SX chips I have. Once I have gotten this working, I plan to use 28-pin scenix chips as the brains of programmer kits to be distributed to others. I'm planning to use a serial connection with hardware handshake between the PC and "doctor" SX or PIC, and then have the doctor mcu program the "patient" SX in parallel mode (which seems easier to implement).

Serial and in-circuit programming is more difficult to pull off, especially for a novice like me. If you really need that, you should invest in the SX Key system from Parallax. Visit their web site at "http://www.parallaxinc.com".

I'm anticipating being able to offer the kit at around $50(US) for PCB and all parts, or $25(US) for PCB and pre-programmed "doctor" SX only.

Bug Fixes, Modifications

Before complaining about a bug or requesting the addition of a feature, make sure you have downloaded the latest version and confirmed that the bug is still present (or the feature is still missing).

11/24/98 Put this thing on the web.

11/25/98 I found that the TRIS command jumped to $05. This was a bug in the "branch to proper opcode routine" part of the simulator.

11/27/98 Moved the expression evaluator, and changed it slightly, so that expression can be used anywhere, not just following EQU. Also added parentheses to the expression engine. Changed the sx18.inc and sx28.inc header files to set the FUSE memory location using an expression directly inside the MEM directive. Added simplistic IFDEF, IFNDEF, ELSE, ENDIF" engine, using 10-item boolean array. Wrote TEST5.ASM and TEST6.ASM to test these features.

21/1/98 Added translations in the parser, so that Scenix-style syntax is converted to MicroChip- style syntax. This allows the rest of the Assembly process to remain unchanged.

To Do...

Soon

Create full tests of all assembler functions.

Create full tests of all simulator functions.

Programmer software and hardware. I haven't decided whether or not to freely-distribute the specifications for the programmer hardware. I intend to sell assembled and tested units. If someone else comes out with relatively cheap hardware, I may drop the entire thing.

Eventually

Separate LST (listing) file into a LST file and a SIM file, so that the assembler can store information of use to the simulator. This will allow the LIST and NOLIST directives to be implemented without effecting the simulator.

Decode and assemble Scenix-style opcodes and syntax.

Highly unlikely, but remotely possible

Macros

Data allocation directives (DB, DS, etc.)