Delay Code Generator

Delay

Instruction cycles

Seconds

Temporary registers names

Clock frequency

MHz

Generate routine   
 

For long delays (> 10 cycles) the code is based on nested loops using 'decfsz' and 'goto' instructions. Small delays are built using 'goto $ + 1' (2 cycles delay) and 'nop' (one cycle delay).

To calculate nested loop counter values the code generator uses an optimum search algorithm. The algorithm finds such values for counters that achieve good approximation to the specified delay.

Even if there is an error in the first block of nested loops, the rest of the code fixes that. As a result, one cycle resolution is achieved.

Idea: James Newton
Implementation: Nikolai Golovchenko