P R O G R A M M E R
21
Pins ˛ Selects the number of pins for SX18 (20)/28. Set it to the correct value, according to your target
microcontroller.
Reset Time ˛ Delay Reset Timer (DRT) timeout period (SX48/52 only). The SX18 (20)/28 devices have a
fixed startup time of 18 ms when the wakeup reset occurs. The SX48/52 devices have a programmable startup
time. Timeout period can be one of the following: 0.06 ms, 18 ms, 60 ms, 960 ms.
BrownOut ˛ Set the Brown Out Reset threshold voltage. When the supply voltage to the SX device drops
below a specified value but remains above zero volts, it is called as ´brown-outµ condition. The SX device has a
brownout detection circuit that puts the device into the reset state when the brownout occurs, and allows the
device to re-start when the brownout condition ends. This feature prevents the device from producing
abnormal results when the supply voltage falls to unreliable levels. The brownout threshold voltage can be
programmed to the following three levels ˛ 4.2 V, 2.6 V, 2.2 V. If the supply voltage drops below this level but
remains above zero, the brownout circuit holds the SX device in the reset state. When the voltage rises above
this threshold, the device start operating again, starting at the reset address. Fine-tuning of the brownout
threshold voltage can be done with brownout trim bits.
If the brownout detection circuit disabled, device will still operate below the brownout threshold voltage, but
will produce unreliable results if the supply voltage falls too low.
Turbo mode ˛ SX18 (20)/28 only option. If set, the instruction clock rate is equal to the oscillator clock rate. If
cleared, the instruction rate operates at one-fourth the oscillator clock rate. See also &hapter 4, option 7).
Watchdog Timer ˛ Enable Watchdog Timer. If set, a watchdog timeout occurs when the watchdog timer
overflows. This feature provides an escape mechanism from an infinite loop or other abnormal program
conditions. When a watchdog timeout occurs, it resets the device just like assertion of the M&LR input. The
watchdog oscillator has a nominal frequency of 14 kHz; at this rate 8-bit watchdog timer overflows in 18 ms.
the watchdog period can be increased under program control up to 2.34 s with OPTION register.
&ode Protect ˛ &ode Protection. If set, the program code and configuration registers read back as scrambled
data. This prevents reverse engineering of your proprietary code and configuration options.
Add/Sub with & ˛ &arry bit Input. If set, carry bit will be add into all addition operations (ADD fr, W means
fr fr+W+&); and to subtract the complement of the carry bit from all subtraction operations (SUB fr, W
means fr fr-W-/&). If clear, carry bit will be ignored as an input for addition and subtraction operations.
Input Sync ˛ Synchronous Input Mode. If set, input signals will be synchronized with internal clock through
two internal flip-flops. If clear, input signals will go directly to the port inputs.
IFBD ˛ Internal Feedback Disable. External oscillator mode only. If set, the crystal/oscillator can rely on the
internal feedback resistor between the OS&1 and OS&2 pins. If clear, an external feedback resistor is required
between the OS&1 and OS&2 pins.
Option Extend ˛ OPTION register Extension and Stack Extension, SX18 (20)/28 only option. If set, enable
programmability of bit 6 and 7 in the OPTION register, the RTW and RTE_IE bits and to extend the stack